Petter Gustad <newsmailcomp4@gustad.com> writes:
> Ole Myren Rohne <ole.rohne@fys.uio.no> writes:
>
> > Marco Antoniotti <marcoxa@cs.nyu.edu> writes:
> >
> > > Once you have chosen your Hardware Design Language (VHDL, Verilog or
> > > one you have implemented from scratch in CL) you can start writing the
> > > "Symbolics type CPU".
> >
> > That's cheating! He needs to start defining a lisp-based HDL;-)
>
> Well, you could write it in EDIF, which is Lisp :-)
Well, I personally like lisp, and dislike VHDL, can EDIF be recommended as a
general purpose HDL?
How widely its used? Is it supported by most foundries?
Is there something that is cheap enough for student to import edif files to
FPGA:s.
Jouni Osmala
Helsinki University of Technology
Electrical Engineering.
ps. They only teach us VHDL. (And if there is something better I'd love to
learn it.)
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